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<div class="header">
  <div class="summary">
<a href="#pub-attribs">Data Fields</a>  </div>
  <div class="headertitle"><div class="title">CPSR_Type Struct Reference<div class="ingroups"><a class="el" href="group__CMSIS__core__register.html">Core Register Access</a> &raquo; <a class="el" href="group__CMSIS__CPSR.html">Current Program Status Register (CPSR)</a></div></div></div>
</div><!--header-->
<div class="contents">

<p>Bit field declaration for CPSR layout.  
 <a href="unionCPSR__Type.html#details">More...</a></p>

<p><code>#include &lt;core_ca.h&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:a1a5ce3093dedfa2fcd7b068e6a76b9b1"><td class="memItemLeft" >struct {</td></tr>
<tr class="memitem:abad02069ef1b26229fab0e0e7371f40e"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a2bc38ab81bc2e2fd111526a58f94511f">M</a>:5</td></tr>
<tr class="memdesc:abad02069ef1b26229fab0e0e7371f40e"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 0.. 4 Mode field  <a href="unionCPSR__Type.html#a2bc38ab81bc2e2fd111526a58f94511f">More...</a><br /></td></tr>
<tr class="separator:abad02069ef1b26229fab0e0e7371f40e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a585f9e79aeb04581519aebee481db262"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#ac5ec7329b5be4722abc3cef6ef2e9c1b">T</a>:1</td></tr>
<tr class="memdesc:a585f9e79aeb04581519aebee481db262"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 5 Thumb execution state bit  <a href="unionCPSR__Type.html#ac5ec7329b5be4722abc3cef6ef2e9c1b">More...</a><br /></td></tr>
<tr class="separator:a585f9e79aeb04581519aebee481db262"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:acb775d24977837fd8bcad930faeb6421"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a20bbf5d5ba32cae380b7f181cf306f9e">F</a>:1</td></tr>
<tr class="memdesc:acb775d24977837fd8bcad930faeb6421"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 6 FIQ mask bit  <a href="unionCPSR__Type.html#a20bbf5d5ba32cae380b7f181cf306f9e">More...</a><br /></td></tr>
<tr class="separator:acb775d24977837fd8bcad930faeb6421"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a3642a5c1f3efd522495e7b527a44bea8"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a0d277e8b4d2147137407f526aa9e3214">I</a>:1</td></tr>
<tr class="memdesc:a3642a5c1f3efd522495e7b527a44bea8"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 7 IRQ mask bit  <a href="unionCPSR__Type.html#a0d277e8b4d2147137407f526aa9e3214">More...</a><br /></td></tr>
<tr class="separator:a3642a5c1f3efd522495e7b527a44bea8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aec336dc183fd7d1dcef10f028d89fc8a"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a8dc2435a7c376c9b8dfdd9748c091458">A</a>:1</td></tr>
<tr class="memdesc:aec336dc183fd7d1dcef10f028d89fc8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 8 Asynchronous abort mask bit  <a href="unionCPSR__Type.html#a8dc2435a7c376c9b8dfdd9748c091458">More...</a><br /></td></tr>
<tr class="separator:aec336dc183fd7d1dcef10f028d89fc8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a51cea0b7df16fb34718da05ab2b9eba2"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a96bd175ed9927279dba40e76259dcfa7">E</a>:1</td></tr>
<tr class="memdesc:a51cea0b7df16fb34718da05ab2b9eba2"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 9 Endianness execution state bit  <a href="unionCPSR__Type.html#a96bd175ed9927279dba40e76259dcfa7">More...</a><br /></td></tr>
<tr class="separator:a51cea0b7df16fb34718da05ab2b9eba2"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="memdesc:a30464dd9de9748e1adeeded64f636bf8"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 10..15 If-Then execution state bits 2-7  <a href="unionCPSR__Type.html#a8bdd87822e3c00b3742c94a42b0654b9">More...</a><br /></td></tr>
<tr class="separator:a30464dd9de9748e1adeeded64f636bf8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a052baeb1e786a19e80b1bfaa09f6717f"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#acc18314a4088adfb93a9662c76073704">GE</a>:4</td></tr>
<tr class="memdesc:a052baeb1e786a19e80b1bfaa09f6717f"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 16..19 Greater than or Equal flags  <a href="unionCPSR__Type.html#acc18314a4088adfb93a9662c76073704">More...</a><br /></td></tr>
<tr class="separator:a052baeb1e786a19e80b1bfaa09f6717f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1dc040545fdfaf656fe8faedfd549654"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a5d4e06d8dba8f512c54b16bfa7150d9d">J</a>:1</td></tr>
<tr class="memdesc:a1dc040545fdfaf656fe8faedfd549654"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 24 Jazelle bit  <a href="unionCPSR__Type.html#a5d4e06d8dba8f512c54b16bfa7150d9d">More...</a><br /></td></tr>
<tr class="separator:a1dc040545fdfaf656fe8faedfd549654"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="memdesc:ac0d5bc3ccceafe2895fc46847e416514"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 25..26 If-Then execution state bits 0-1  <a href="unionCPSR__Type.html#a5299532c92c92babc22517a433686b95">More...</a><br /></td></tr>
<tr class="separator:ac0d5bc3ccceafe2895fc46847e416514"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a990285f842a437604d07ffb1cc9a5c85"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a0bdcd0ceaa1ecb8f55ea15075974eb5a">Q</a>:1</td></tr>
<tr class="memdesc:a990285f842a437604d07ffb1cc9a5c85"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 27 Saturation condition flag  <a href="unionCPSR__Type.html#a0bdcd0ceaa1ecb8f55ea15075974eb5a">More...</a><br /></td></tr>
<tr class="separator:a990285f842a437604d07ffb1cc9a5c85"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af0dfdc2cfb43a369c906382ae385b1d5"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#aba74c9da04be21f1266d3816af79f8c3">V</a>:1</td></tr>
<tr class="memdesc:af0dfdc2cfb43a369c906382ae385b1d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 28 Overflow condition code flag  <a href="unionCPSR__Type.html#aba74c9da04be21f1266d3816af79f8c3">More...</a><br /></td></tr>
<tr class="separator:af0dfdc2cfb43a369c906382ae385b1d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1800b083d49716cfc8dee5d0c3157f69"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#aa967d0e42ed00bd886b2c6df6f49a7e2">C</a>:1</td></tr>
<tr class="memdesc:a1800b083d49716cfc8dee5d0c3157f69"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 29 Carry condition code flag  <a href="unionCPSR__Type.html#aa967d0e42ed00bd886b2c6df6f49a7e2">More...</a><br /></td></tr>
<tr class="separator:a1800b083d49716cfc8dee5d0c3157f69"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa13c06606b1d7517eae415b205e46e24"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a790f1950658257a87ac58d132eca9849">Z</a>:1</td></tr>
<tr class="memdesc:aa13c06606b1d7517eae415b205e46e24"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 30 Zero condition code flag  <a href="unionCPSR__Type.html#a790f1950658257a87ac58d132eca9849">More...</a><br /></td></tr>
<tr class="separator:aa13c06606b1d7517eae415b205e46e24"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a7b191954a3803694de03178a888bfd8e"><td class="memItemLeft" >&#160;&#160;&#160;uint32_t&#160;&#160;&#160;<a class="el" href="unionCPSR__Type.html#a26907b41c086a9f9e7b8c7051481c643">N</a>:1</td></tr>
<tr class="memdesc:a7b191954a3803694de03178a888bfd8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">bit: 31 Negative condition code flag  <a href="unionCPSR__Type.html#a26907b41c086a9f9e7b8c7051481c643">More...</a><br /></td></tr>
<tr class="separator:a7b191954a3803694de03178a888bfd8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1a5ce3093dedfa2fcd7b068e6a76b9b1"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPSR__Type.html#a1a5ce3093dedfa2fcd7b068e6a76b9b1">b</a></td></tr>
<tr class="memdesc:a1a5ce3093dedfa2fcd7b068e6a76b9b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure used for bit access.  <br /></td></tr>
<tr class="separator:a1a5ce3093dedfa2fcd7b068e6a76b9b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afd5ed10bab25f324a6fbb3e124d16fc9"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="unionCPSR__Type.html#afd5ed10bab25f324a6fbb3e124d16fc9">w</a></td></tr>
<tr class="memdesc:afd5ed10bab25f324a6fbb3e124d16fc9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Type used for word access.  <br /></td></tr>
<tr class="separator:afd5ed10bab25f324a6fbb3e124d16fc9"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><p>Bit field declaration for CPSR layout. </p>
</div><h2 class="groupheader">Field Documentation</h2>
<a id="a8dc2435a7c376c9b8dfdd9748c091458" name="a8dc2435a7c376c9b8dfdd9748c091458"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8dc2435a7c376c9b8dfdd9748c091458">&#9670;&#160;</a></span>A</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint32_t CPSR_Type::A</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>bit: 8 Asynchronous abort mask bit </p>

</div>
</div>
<a id="a1a5ce3093dedfa2fcd7b068e6a76b9b1" name="a1a5ce3093dedfa2fcd7b068e6a76b9b1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a1a5ce3093dedfa2fcd7b068e6a76b9b1">&#9670;&#160;</a></span></h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">struct  { ... }  CPSR_Type::b</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Structure used for bit access. </p>

</div>
</div>
<a id="aa967d0e42ed00bd886b2c6df6f49a7e2" name="aa967d0e42ed00bd886b2c6df6f49a7e2"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa967d0e42ed00bd886b2c6df6f49a7e2">&#9670;&#160;</a></span>C</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint32_t CPSR_Type::C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>bit: 29 Carry condition code flag </p>

</div>
</div>
<a id="a96bd175ed9927279dba40e76259dcfa7" name="a96bd175ed9927279dba40e76259dcfa7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a96bd175ed9927279dba40e76259dcfa7">&#9670;&#160;</a></span>E</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint32_t CPSR_Type::E</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>bit: 9 Endianness execution state bit </p>

</div>
</div>
<a id="a20bbf5d5ba32cae380b7f181cf306f9e" name="a20bbf5d5ba32cae380b7f181cf306f9e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a20bbf5d5ba32cae380b7f181cf306f9e">&#9670;&#160;</a></span>F</h2>

<div class="memitem">
<div class="memproto">
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          <td class="memname">uint32_t CPSR_Type::F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>bit: 6 FIQ mask bit </p>

</div>
</div>
<a id="acc18314a4088adfb93a9662c76073704" name="acc18314a4088adfb93a9662c76073704"></a>
<h2 class="memtitle"><span class="permalink"><a href="#acc18314a4088adfb93a9662c76073704">&#9670;&#160;</a></span>GE</h2>

<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">uint32_t CPSR_Type::GE</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>bit: 16..19 Greater than or Equal flags </p>

</div>
</div>
<a id="a0d277e8b4d2147137407f526aa9e3214" name="a0d277e8b4d2147137407f526aa9e3214"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0d277e8b4d2147137407f526aa9e3214">&#9670;&#160;</a></span>I</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">uint32_t CPSR_Type::I</td>
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</div><div class="memdoc">

<p>bit: 7 IRQ mask bit </p>

</div>
</div>
<a id="a5299532c92c92babc22517a433686b95" name="a5299532c92c92babc22517a433686b95"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5299532c92c92babc22517a433686b95">&#9670;&#160;</a></span>IT0</h2>

<div class="memitem">
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      <table class="memname">
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          <td class="memname">uint32_t CPSR_Type::IT0</td>
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</div><div class="memdoc">

<p>bit: 25..26 If-Then execution state bits 0-1 </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a8bdd87822e3c00b3742c94a42b0654b9">&#9670;&#160;</a></span>IT1</h2>

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<p>bit: 10..15 If-Then execution state bits 2-7 </p>

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<p>bit: 24 Jazelle bit </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a2bc38ab81bc2e2fd111526a58f94511f">&#9670;&#160;</a></span>M</h2>

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<p>bit: 0.. 4 Mode field </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a26907b41c086a9f9e7b8c7051481c643">&#9670;&#160;</a></span>N</h2>

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<p>bit: 31 Negative condition code flag </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a0bdcd0ceaa1ecb8f55ea15075974eb5a">&#9670;&#160;</a></span>Q</h2>

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<p>bit: 27 Saturation condition flag </p>

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<h2 class="memtitle"><span class="permalink"><a href="#ac5ec7329b5be4722abc3cef6ef2e9c1b">&#9670;&#160;</a></span>T</h2>

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<p>bit: 5 Thumb execution state bit </p>

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<h2 class="memtitle"><span class="permalink"><a href="#aba74c9da04be21f1266d3816af79f8c3">&#9670;&#160;</a></span>V</h2>

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<p>bit: 28 Overflow condition code flag </p>

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<h2 class="memtitle"><span class="permalink"><a href="#afd5ed10bab25f324a6fbb3e124d16fc9">&#9670;&#160;</a></span>w</h2>

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<p>Type used for word access. </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a790f1950658257a87ac58d132eca9849">&#9670;&#160;</a></span>Z</h2>

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<p>bit: 30 Zero condition code flag </p>

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